In the semiconductor industry, there has been a high-level of activity using strained Si-based heterostructures to achieve high carrier mobility structures for complementary metal oxide semiconductor (CMOS) applications. Traditionally, to boast performance of NFET and PFET devices, the prior art method to implement this has been to grow strained layers on thick (on the order of from about 1 to about 5 micrometers) relaxed SiGe buffer layers.
Despite the high channel electron mobilities reported for prior art heterostructures; the use of thick SiGe buffer layers has several noticeable disadvantages associated therewith. First, thick SiGe buffer layers are not typically easy to integrate with existing Si-based CMOS technology. Second, the defect density, including threading dislocations (TDs) and misfit dislocations, are from about 106 to about 108 defects/cm2 which are still too high for realistic VLSI (very large scale integration) applications. Thirdly, the nature of the prior art structures precludes selective growth of the SiGe buffer layer so that circuits employing devices with strained Si, unstrained Si and SiGe materials are difficult, and in some instances, nearly impossible to integrate.
In order to produce relaxed SiGe material on a Si substrate, prior art methods typically grow a uniform, graded or stepped, SiGe layer to beyond the metastable critical thickness (i.e., the thickness beyond which dislocations form to relieve stress) and allow misfit dislocations to form, with the associated threading dislocations, through the SiGe buffer layer. Various buffer structures have been used in an attempt to increase the length of the misfit dislocation section in the structures and thereby to decrease the TD density.
When a typical prior art metastable strained SiGe layer is annealed at a sufficiently high temperature, misfit dislocations will form and grow thereby relieving the total strain on the film. In other words, the initial elastic strain of the film is relieved by the onset of plastic deformation of the crystal lattice. For the case of prior art metastable strained SiGe grown on SOI substrates, experiments have shown that under most annealing/oxidation conditions, the formation of misfit dislocations occurs early in the annealing history for temperatures greater than ˜700° C. Many of these defects are then either consumed or annihilated during the high-temperature annealing of the structure, however, the surface topography of the original misfit array persists during oxidation.
Furthermore, prior art methods of fabricating SGOI substrate materials by thermal diffusion do not completely relax the SiGe alloy layer. Instead, the final SiGe lattice expands only to some fraction of the equilibrium value because for any given small value of SiGe film trying to relax during oxidation, there are adjacent volumes on all sides which exert a force opposing that of relaxation. For example, it has been observed that when one uses the prior art thermal mixing approach to form SGOI substrate materials, under certain conditions the relaxation of the final SiGe alloy saturates at a value between 40 and 70% for a particular SOI starting wafer and an initial SiGe alloy layer.
This saturation suggests that an equilibrium condition is reached between the strain-relieving mechanisms and the elastic energy that persists within the partially relaxed, compressively strained SGOI material. In order for a compressively strained layer to completely relax elastically (without defect formation), the lateral (i.e., parallel to the substrate surface) dimensions of the film must, in some way, increase. To date, the prior art does not provide any means of increasing the lateral dimensions of the SiGe alloy film such that the force of relaxation is greater than the forces opposing relaxation.
In view of the problems mentioned above with prior art processes of fabricating a substantially relaxed SGOI substrate material, there is a continued need for providing a new and improved method that allows for formation of a substantially relaxed, single crystal SiGe buffer layer for a SOI substrate. The terms “substantially relaxed” or “highly relaxed” denote a SGOI substrate wherein the final SiGe alloy is from about 50 to about 100% relaxed. Moreover, 100% relaxation denotes a SiGe layer having a (unstrained) diamond-cubic lattice with a lattice constant that is determined by the Ge fraction and which is the same in all three principal lattice directions.